RT Conference Proceedings
T1 Robustness of different TMR granularities in shared wishbone architectures on SRAM FPGA
A1 Kretzschmar, U.
A1 Astarloa, A.
A1 Lazaro, J.
A1 Garay, M.
A1 Del Ser, J.
AB Triple Module Redundancy (TMR) is a popular technique for protecting critical FPGA designs. Although automatic tools for TMR generation mostly use triplication on flip-flop level, designers may opt for different approaches. This work analyses the impact of different granularities on TMR architectures based on a coarse-and a medium-grained TMR implementation of a shared Wishbone interconnection. The actual robustness of these different implementations is measured on a Xilinx Virtex-5 FPGA by using error injection into the configuration bitstream. A specialized test setup comprising two FPGAs boards is introduced so as to allow for the execution of the robustness testing. Based on the coarse-grained architecture, a fine categorization of errors in TMR architectures can be obtained.
SN 9781467329217
YR 2012
FD 2012
LK https://hdl.handle.net/11556/1933
UL https://hdl.handle.net/11556/1933
LA eng
NO Kretzschmar , U , Astarloa , A , Lazaro , J , Garay , M & Del Ser , J 2012 , Robustness of different TMR granularities in shared wishbone architectures on SRAM FPGA . in 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012 . , 6416785 , 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012 , 2012 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2012 , Cancun , Mexico , 5/12/12 . https://doi.org/10.1109/ReConFig.2012.6416785
NO conference
DS TECNALIA Publications
RD 28 jul 2024